I2C and RTL2832U
The RTL2832U contains an 8051 core which handles the USB control and I2C transfers. The I2C transfer was intended for communication with the internal demodulator (not supported in the SDR) and the tuner. In normal situations, the I2C-repeater is turned off, but, if necessary, it can be switched on.
For the usage of this functionality, the following steps are necessary:
- Activation of the I2C-Repeater: set_i2c_repeater(dev, true);
- Communication with I2C-device: i2c_read_reg/i2c_write_reg
- Deactivation of the I2C-Repeater: set_i2c_repeater(dev, false).
8 bit Register
The clock and expansion cards have an integrated 8-bit register and LED indicators for debugging purposes. Moreover, these cards provide an I2C-interface, so that further hardware components can be easily attached to the receiver.
I2C-write/read-register commands have the following options:
- I2C address of the device
The I2C address of the 8-bit register is (0x40/0x41):
- Fixed part (0|1|0|0)
- Hardware selectable part (A2|A1|A0) (000)
- R/W (0/1)
The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read.
|0||Read Byte||Input Port Register|
|1||read/write byte||Output Port Register|
|2||read/write byte||Polarity Inversion Register|
||read/write byte||Configuration Register|
Register and values are the following:
- Register 3: configure as an output; 0 = corresponding pin enabled as an output
- Register 1: LED/interface: 0bit is on; 1bit is off
For example, 0x01 – d6 is on; all others are off.
Management of the antenna switch and noise generator cards
Power supply of the antenna switch card
The antenna switch card is powered via software selectable bias tee of the RTL-SDR dongle v.3. Please see the software selectable bias tee feature description on the RTL-SDR site.
You can use the rtl_biast for tests:
ON: rtl_biast -dX -b 1
OFF: rtl_biast -dX -b
Bias tee is activated via GPIO0 (Output mode) of the RTL2832U dongle.
Antenna switch and noise generator card management
The management of the antenna switches and noise generator card is done via 8-bit register of the clock card, see above.
|00-D0||D6||Power Noise Generator|
|01-D1||D7||Antenna switch 1 (ON/OFF)|
|02-D2||D8||Antenna switch 2 (ON/OFF)|
|03-D3||D9||Antenna switch 3 (ON/OFF)|
|04-D4||D5||Antenna switch 4 (ON/OFF)|
Please note: 0 on the register (LED on the clock card is lightning); 1 on the register (LED on the clock card is OFF).
Example: 0x00 – normal mode (Noise Generator is off, AS1-4 are connected to the antenna input). 0x1f (000 1111 1) – Noise Generator is on, AS1-4 are connected to the alternative signal source (noise source in the case).
Managing of multi-band RF frequency synthesizer
Our downconverter support following center frequencies:
- 3000-3620 MHz (direct output)
- 4000-4650 MHz (direct output)
- 1500-1810 MHz (internal divider by 2)
- 2000-2325 MHz (internal divider by 2)
- 750-905 MHz (internal divider by 4)
- 1000-1162.5 MHz (internal divider by 4)
We are using the integrated RF synthesizer with voltage controlled oscillators (VCOs) based on the STW81102 from STMicroelectronics. The module is connected via I2C. The device address is set at “1100 000”. The 8th bis (LSB) is the read or write (RW) operation bit, which is set to 1 in read mode and to 0 in write mode.
Please see STW81102 datasheet, pages 32-35 for the detailed description.
There are at least 3 possibilities to check the continuity.
- The library librtlsdr has an integrated utility rtl_test. This tool is continuously read from the device, and reports if samples become lost. This functionality is based on the “SetTestMode”-function that sets the device to test mode returning 8 bit counters instead of samples. The counter is generated inside the device. You can use this utility in order to check if the samples will be reliably delivered from all receivers in the coherent array before beginning to receive the samples.
- RTL2832U has a register for dropped blocks (188 bytes) due to full FIFO.
- You can put a sine wave into the receiver input, e.g. from a generator, and calculate the derivative in order to find the sample losses.
Customers have reported that they cannot achieve the continuity over the required time intervals using the Linux Vanilla-Kernel. This problem has been solved by the installation and special configuration of the Real-Time Linux Kernel.
We think that the usage of the Linux SDR API can improve the overall performance but haven’t made any tests.
Bulk vs. Isochronous Transfers
“Isochronous Transfers are used for transmitting real-time information such as audio and video data, and must be sent at a constant rate. USB isochronous data streams are allocated a dedicated portion of USB bandwidth to ensure that data can be delivered at the desired rate. An Isochronous pipe sends a new data packet in every frame, regardless of the success or failure of the last packet. Isochronous Transfers have no error detection. Any error in electrical transmission is not corrected”.
“Bulk transfers are large sporadic transfers using all remaining available bandwidth, but with no guarantees on bandwidth or latency (e.g., file transfers). Bulk transfers provide error correction in the form of a CRC16 field on the data payload and error detection/re-transmission mechanisms ensuring data is transmitted and received without error”.
RTL2832U’s data pipe supports both transfer types: isochronous and bulk. Isochronous Transfers have no error detection and it is impossible to estimate how many samples have been lost.
At the moment, there are different approaches available for stream calibration:
- Usage of the signals with known structure, e.g. GSM. See Multi-RTL project for more details.
- Calculation of the correlation function based on the white noise. See RTL_Coherent project for more details.
- We provide the antenna switch card and the noise generator card in order to provide the white noise (on/off) for the correlation function calculation
R820T2 and RTL-SDR Phase Drift
The experimental fork of the librtlsdr https://github.com/keenerd/rtl-sdr.git/ allows switching the dithering feature off. Function “rtlsdr_set_dithering” must be performed before freq_set() and works only with r820t tuners (supported by the single channel receiver). You can find more details on this topic in the Peter W. East paper “Postscript to Quad RTL Receiver”.
If the SDM (sigma-delta modulator) is powered on (Reg: 0x12; RegName: R18; B3) than the phases are drifting very slowly over time depending on the tuner frequency. We made following experiment: periodic cosine signal was provided to the input of the R820T2 and analog R820T2 outputs from several receivers were connected to the different oscilloscope/signal viewer channels. The phase drift was very clear to determine over the interval of several minutes. The same results were also achieved using the periodic cosine signal and GNURadio scope module.
The phases between receivers were also lost by the frequency change or in case of the dongle reset.
The negative impact of the SDM switching off is the lesser frequency precision of the tuner. Therefore, it makes sense to investigate the software phase drift compensation with the SDM switched on. The academic paper “Time and Frequency Corrections in a Distributed Network Using GNURadio” from Utah State University presents signal processing methods in order to minimize the clock drift and phase and frequency offsets. Though the paper’s main objective to present a real time method for synchronisation without common clock or other hard connection, same/comparable methods can be used for phase drift compensation in the systems with common clock as well. The proposed implementation uses custom GNURadio blocks that can be found at https://github.com/samwhiting/gnuradio-doa. Please take also a look at the presentation “Software-Defined Radio Beamforming” (Direction of Arrival Analysis).
If the SDM is off, phases remain stable over longer period of time. If the SDM shift -> 0 see point 3 of http://osmocom-sdr.osmocom.narkive.com/DygeFZJH/r820t-tuning-range-revisited than the frequency precision is the same as with SDM switched on (e.g. 122.430.040 MHZ). We have investigated different frequencies offsets of 28,800 (or more correct input clock), 14,400; 7,200; 3,600; 1,800; 0,900; 0,450; 0,225 and were able to get the more precise frequency setting of the R820T2 than with other frequency offsets. The further investigation of the R820T2’ PLL (16/17?) would lead to the better frequency setting (also may be with the usage of different IFs or input clocks in case of the SI5351 architectures). This topic was also discussed in the AIRSPY-Yahoo Group: https://uk.groups.yahoo.com/neo/groups/airspy/conversations/topics/3420.
We also checked if the gain changes of the R820T2 have influence on the phase shift between the receivers. There is no influence. Therefore, it is possible to use different gains on the various signal sources using the antenna switch.